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SY87701AL 1 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 description features SY87701AL industrial temperature range (C40 c to +85 c) 3.3v power supply clock and data recovery from 28mbps up to 1.3gbps nrz data stream, clock generation from 28mbps to 1.3gbps complies with bellcore, itu/ccitt and ansi specifications for applications such as oc-1, oc-3, oc-12, atm, fddi, fibre channel and gigabit ethernet as well as proprietary applications two on-chip plls: one for clock generation and another for clock recovery selectable reference frequencies differential pecl high-speed serial i/o line receiver input: no external buffering needed link fault indication 100k ecl compatible i/o lower power: fully compatible with micrel's sy87701v, but with 30% less power available in 32-pin epad-tqfp and 28-pin soic packages (28-pin soic is available, but not recommended for new designs.) the SY87701AL is a complete clock recovery and data retiming integrated circuit for data rates from 28mbps up to 1.3gbps nrz. the device is ideally suited for sonet/sdh/atm and fibre channel applications and other high-speed data transmission systems. clock recovery and data retiming is performed by synchronizing the on-chip vco directly to the incoming data stream. the vco center frequency is controlled by the reference clock frequency and the selected divide ratio. on-chip clock generation is performed through the use of a frequency multiplier pll with a byte rate source as reference. the SY87701AL also includes a link fault detection circuit. all support documentation can be found on micrels web site at: www.micrel.com. 3.3v 28mbps to 1.3gbps anyrate ? clock and data recovery applications sonet/sdh/atm oc-1, oc-3, oc-12, oc-24 fibre channel, escon, smpte 259 gigabit ethernet/fast ethernet proprietary architecture up to 1.3gbps phase detector phase/ frequency detector charge pump vco charge pump vco link fault detector divider by 8, 10, 16, 20 refclk cd rdinn rdinp pllr p/n clksel rdoutp rclkp rclkn rdoutn lfin freqsel 1/2/3 plls p/n divsel 1/2 SY87701AL tclkp tclkn v cc v cca v cco gnd 1 0 (pecl) (pecl) (ttl) (ttl) (pecl) (ttl) (pecl) (pecl) (ttl) (ttl) 0 1 phase/ frequency detector block diagram anyrate is a registered trademark of micrel, inc. rev.: f amendment: /0 issue date: november 2006
SY87701AL 2 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 package/ordering information pllsp tclkn 18 11 pllsn clksel 17 12 gnda pllrp 16 13 gnd pllrn 15 14 1 vcca lfin divsel1 rdinp rdinn freqsel1 refclk freqsel2 freqsel3 n/c 28 vcc cd divsel2 rdoutp rdoutn vcco rclkp rclkn vcco tclkp 27 26 25 24 23 22 21 20 19 2 3 4 5 6 7 8 9 10 28-pin soic (z28-1) vcc vcca vcca lfin divsel1 vcc cd divsel2 gnd gnd gnda pllsn pllsp pllrn pllrp clksel rdoutp rdoutn vcco rclkp rclkn vcco tclkp tclkn nc rdinp rdinn freqsel1 refclk freqsel2 freqsel3 nc 32 31 30 29 28 27 26 25 910111 213141516 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 32-pin epad tqfp (h32-1) ordering information package operating package lead part number type range marking finish SY87701ALzi z28-1 industrial SY87701ALzi sn-pb SY87701ALhi h32-1 industrial SY87701ALhi sn-pb SY87701ALzg z28-1 industrial SY87701ALzg with pb-free pb-free bar-line indicator nipdau SY87701ALhg (1) h32-1 industrial SY87701ALhg with pb-free pb-free bar-line indicator nipdau note: 1. pb-free package recommended for new designs.
SY87701AL 3 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 pin number pin number soic tqfp pin name pin function 42 rdinp serial data input (differential pecl): these built-in line receiver inputs are 53 rdinn connected to the differential receive serial data stream. an internal receive pll recovers the embedded clock (rclk) and data (rdout) information. the incoming data rate can be within one of eight frequency ranges depending on the state of the freqsel pins. see frequency selection table. 75 refclk reference clock (ttl inputs): this input is used as the reference for the internal frequency synthesizer and the training frequency for the receiver pll to keep it centered in the absence of data coming in on the rdin inputs. 27 26 cd carrier detect (pecl input): this input controls the recovery function of the receive pll and can be driven by the carrier detect output of optical modules or from external transition detection circuitry. when this input is high the input data stream (rdin) is recovered normally by the receive pll. when this input is low the data on the inputs rdin will be internally forced to a constant low, the data outputs rdout will remain low, the link fault indicator output lfin forced low and the clock recovery pll forced to look onto the clock frequency generated from refclk. 64 freqsel1 frequency select (ttl inputs): these inputs select the output clock frequency 86 freqsel2 range as shown in the frequency selection table. 97 freqsel3 33 2 divsel1 divider select (ttl inputs): these inputs select the ratio between the output clock 26 25 divsel2 frequency (rclk/tclk) and the refclk input frequency as shown in the reference frequency selection table. 17 16 clksel clock select (ttl inputs): this input is used to select either the recovered clock of the receiver pll (clksel = high) or the clock of the frequency synthesizer (clksel = low) to the tclk outputs. 23 1 lfin link fault indicator (ttl output): this output indicates the status of the input data stream rdin. active high signal is indicating when the internal clock recovery pll has locked onto the incoming data stream. lfin will go high if cd is high and rdin is within the frequency range of the receive pll (1000ppm). 25 24 rdoutp receive data output (differential pecl): these ecl 100k outputs represent the 24 23 rdoutn recovered data from the input data stream (rdin). this recovered data is specified against the rising edge of rclk. these outputs must be terminated with 50 ? to v cc C2 or equivalent. thhis applies even if these outputs are not used. 22 21 rclkp clock output (differential pecl): these ecl 100k outputs represent the 21 20 rclkn recovered clock used to sample the recovered data (rdout). 19 18 tclkp clock output (differential pecl): these ecl 100k outputs represent either the 18 17 tclkn recovered clock (clksel = high) used to sample the recovered data (rdout) or the transmit clock of the frequency synthesizer (clksel = low). these outputs must be terminated with 50 ? to v cc C2 or equivalent. this applies even if these outputs are not used. 11 9 pllsp clock synthesis pll loop filter. external loop filter pins for the clock synthesis 12 10 pllsn pll. 16 15 pllrp clock recovery pll loop filter. external loop filter pins for the receiver pll. 15 14 pllrn 28 27, 28, v cc supply voltage (1) 1 29, 30 v cca analog supply voltage (1) 20, 23 19, 22 v cco output supply voltage (1) 13, 14 12, 13 gnd ground 10 1, 8 nc no connect 13 11 gnda analog ground note: 1. v cc , v cca , v cco must be the same value. pin descriptions
SY87701AL 4 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 functional description clock recovery clock recovery, as shown in the block diagram, generates a clock that is at the same frequency as the incoming data bit rate at the serial data input. the clock is phase aligned by a pll so that it samples the data in the center of the data eye pattern. the phase relationship between the edge transitions of the data and those of the generated clock are compared by a phase/frequency detector. output pulses from the detector indicate the required direction of phase correction. these pulses are smoothed by an integral loop filter. the output of the loop filter controls the frequency of the voltage controlled oscillator (vco), which generates the recovered clock. frequency stability without incoming data is guaranteed by an alternate reference input (refclk) that the pll locks onto when data is lost. if the frequency of the incoming signal varies by greater than approximately 1000ppm with respect to the synthesizer frequency, then pll will be declared out of lock, and the pll will lock to the reference clock. the loop filter transfer function is optimized to enable the pll to track the jitter, yet tolerate the minimum transition density expected in a received sonet data signal. this transfer function yields a 30 s data stream of continuous 1's or 0's for random incoming nrz data. the total loop dynamics of the clock recovery pll provides jitter tolerance which is better than the specified tolerance in gr-253-core. lock detect the SY87701AL contains a link fault indication circuit that monitors the integrity of the serial data input. if the recovered serial data from rdin is at the correct data rate (within 1000ppm of the synthesizer frequency), the link fault indicator (lfin) output will be asserted high indicating an in-lock condition and will remain high as long as this condition is met. in the event that the recovered serial data is not at the correct data rate (greater than 1000ppm difference from the synthesizer frequency), then lfin output will go low indicating an out-of-lock condition. this condition will force the clock and data recovery pll (cdr) to lock onto the synthesizer frequency until it is within the correct frequency range (less than 1000ppm difference from the synthesizer frequency). once the cdr is within the correct frequency range it will again lock onto the rdin input. during the interval when the cdr is not locked onto the rdin input, the lfin output will not be a static low, but will be changing.
SY87701AL 5 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 characteristics performance the SY87701AL pll complies with the jitter specifications proposed for sonet/sdh equipment defined by the bellcore specifications: gr-253-core, issue 2, december 1995 and itu-t recommendations: g.958 document, when used with differential inputs and outputs. input jitter tolerance input jitter tolerance is defined as the peak-to-peak amplitude of sinusoidal jitter applied on the input signal that causes an equivalent 1db optical/electrical power penalty. sonet input jitter tolerance requirement condition is the input jitter amplitude which causes an equivalent of 1db power penalty. figure 1. input jitter tolerance oc/sts-n f0 f1 f2 f3 ft level (hz) (hz) (hz) (khz) (khz) 31030 300 6.5 65 12 10 30 300 25 250 15 1.5 0.40 f0 f1 f2 f4 ft sinusoidal input jitter amplitude (ui p-p) frequency -20db/decade -20db/decade a figure 2. jitter transfer oc/sts-n fc p level (khz) (db) 3 130 0.1 12 225 0.1 0.1 -20 fc jitter transfer (db) fre q uenc y -20db/decade acceptable range jitter transfer jitter transfer function is defined as the ratio of jitter on the output oc-n/sts-n signal to the jitter applied on the input oc-n/sts-n signal versus frequency. jitter transfer requirements are shown in figure 2. jitter generation the jitter of the serial clock and serial data outputs shall not exceed .01 u.i. rms when a serial data input with no jitter is presented to the serial data inputs.
SY87701AL 6 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 frequency selection table freqsel1 freqsel2 freqsel3 f vco /f rclk f rclk data rates (mbps) 00 01 650 - 1300 00 12 325 - 650 01 04 163 - 325 01 16 109 - 216 10 0 8 82 - 162 10 1 12 55 - 108 11 0 16 41 - 81 11 1 24 28 - 54 divsel1 divsel2 f rclk /f refclk 00 8 01 10 10 16 11 20 reference frequency selection loop filter components (1) r5 c3 pllsp pllsn wide range r6 = 680 ? c4 = 1.0 f (x7r dielectric) r6 c4 pllrp pllrn note: 1. suggested values. values may vary for different applications. wide range r5 = 350 ? c3 = 1.0 f (x7r dielectric)
SY87701AL 7 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc ) .................................. C0.5v to +4.0v input voltage (v in ) ......................................... C0.5v to v cc output current (i out ) continuous ............................................................. 50ma surge .................................................................... 100ma lead temperature (soldering, 20 sec.) ..................... 260 c storage temperature (t s ) ....................... C65 c to +150 c operating ratings (2) supply voltage (v cc ) .............................. +3.15v to +3.45v ambient temperature (t a ) ......................... C40 c to +85 c package thermal resistance (3) soic ( ja ) (4) ..................................................................... 80 c/w epad tqfp ( ja ) (5) 0lfpm airflow ................................................. 27.6 c/w 200lfpm airflow ............................................. 22.6 c/w 500lfpm airflow ............................................. 20.7 c/w symbol parameter condition min typ max units v cc power supply voltage 3.15 3.3 3.45 v i cc power supply current 120 160 ma dc electrical characteristics v cc = v cco = v cca = 3.3v 5%; t a = C40 c to +85 c; unless noted. symbol parameter condition min typ max units v ih input high voltage v cc C1.165 v cc C0.880 v v il input low voltage v cc C1.810 v cc C1.475 v v oh output high voltage 50 ? to v cc C2v v cc C1.075 v cc C0.830 v v ol output low voltage 50 ? to v cc C2v v cc C1.860 v cc C1.570 v i il input low current v in = v il (min) 0.5 a pecl 100k dc electrical characteristics v cc = v cco = v cca = 3.3v 5%; t a = C40 c to +85 c; unless noted. symbol parameter condition min typ max units v ih input high voltage 2.0 v cc v v il input low voltage 0.8 v v oh output high voltage i oh = C0.4ma 2.0 v v ol output low voltage i ol = 4ma 0.5 v i ih input high current v in = 2.7v, v cc = max. C175 a v in = v cc , v cc = max. +100 a i il input low current v in = 0.5v, v cc = max. C300 a i os output short circuit current v out = 0v (maximum 1 sec) C15 C100 ma notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional op eration is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum r atings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. airflow of 500lfpm recommended for 28-pin soic. 4. 28-pin soic package is not recommended for new designs. 5. using jedec standard test boards with die attach pad soldered to pcb. see www.amkor.com for additional package details. ttl dc electrical characteristics
SY87701AL 8 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 t cpwl t cpwh rdout rclk refclk t odc t odc t skew t dv t dh timing waveforms v cc = v cco = v cca = 3.3v 5%; t a = C40 c to +85 c; unless noted. symbol parameter condition min typ max units f vco vco center frequency f refclk byte rate 625 1300 mhz ? f vco vco center frequency tolerance nominal 5 % t acq acquisition lock time 15 s t cpwh refclk pulse width high 3 ns t cpwl refclk pulse width low 3 ns t ir refclk input rise time 0.5 2 ns t odc output duty cycle (rclk/tclk) 45 55 % of ui t r , t f ecl output rise/fall time 50 ? to v cc C2v 100 500 ps (20% to 80%) t skew recovered clock skew C200 +200 ps t dv data valid 1/(2 f rclk ) C 200 ps t dh data hold 1/(2 f rclk ) C 200 ps ac electrical characteristics
SY87701AL 9 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 application example ac-coupled i/o r13 182 ? sma4 r12 182 ? c27 0.01 f c13 0.01 f c14 0.01 f 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 nc rdinp rdinn freqsel1 refclk freqsel2 freqsel3 nc rdoutp rdoutn vcco rclkp rclkn vcco tclkp tclkn 9 10 11 12 13 14 15 16 pllsp pllsn gnda gnd gnd pllrn pllrp clksel 32 31 30 29 28 27 26 25 q1 2n2222a led d1 r1 350 ? c1 1 f r2 680 ? c11 1 f divsel1 lfin vcca vcca vcc vcc cd divsel2 freqsel1 freqsel2 freqsel3 r26 82 ? r24 130 ? r23 130 ? r25 82 ? c18 0.01 f c19 0.01 f v cc v ee v cca divsel2 c15 0.01 f r14 182 ? c12 0.01 f r11 182 ? v cco r28 182 ? c28 0.01 f r29 182 ? v cc gnd in1 in0 vcc /q1 q1 /q q0 u2 sy89322v u1 SY87701AL v ee v cc in0 v ee v ee v cc r22 12.1k ? r21 130 ? v ee r16 182 ? r32 182 ? c29 0.01 f r30 182 ? sma10 sma9 sma7 sma8 sma6 sma5 v ee c5 0.01 f c1 6.8 f vcca v cca j2 c7 0.01 f c6 6.8 f vcc v cca j3 c31 0.01 f c30 6.8 f vcco v cca j6 c9 0.01 f c8 6.8 f vee v cca j4 gnd j5 clksel r15 182 ? pin 11 pin 12 pin 13 c24 0.1 f c25 0.1 f c26 0.1 f v ee pin 19 pin 22 c21 0.1 f c22 0.1 f v cco pin 27 c20 0.1 f v cc pin 30 c23 0.1 f v cca dip swi tch v ee cd freqsel1 freqsel2 freqsel3 divsel1 divsel2 clksel r10 1k r9 1k r8 1k r7 1k r6 1k r5 1k r3 1k v cc r27 1k sma1 sma2 sma3 r31 50 ? divsel1
SY87701AL 10 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 application example dc-coupled i/o 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 nc rdinp rdinn freqsel1 refclk freqsel2 freqsel3 nc rdoutp rdoutn vcco rclkp rclkn vcco tclkp tclkn 9 10 11 12 13 14 15 16 pllsp pllsn gnda gnd gnd pllrn pllrp clksel 32 31 30 29 28 27 26 25 q1 2n2222a led d1 r1 350 ? c1 1 f r2 680 ? c11 1 f divsel1 lfin vcca vcca vcc vcc cd divsel2 freqsel1 freqsel2 freqsel3 v cca divsel2 v cco v cc gnd in1 in0 vcc /q1 q1 /q q0 u2 sy89322v u1 SY87701AL v ee v cc in0 v ee v ee v cc r22 12.1k ? r21 130 ? v ee r16 182 ? r32 182 ? c29 0.01 f r30 182 ? sma10 sma9 sma7 sma4 sma8 sma6 sma5 v ee c5 0.01 f c1 6.8 f vcca v cca j2 c7 0.01 f c6 6.8 f vcc v cca j3 c31 0.01 f c30 6.8 f vcco v cca j6 c9 0.01 f c8 6.8 f vee v cca j4 gnd j5 clksel r15 182 ? pin 11 pin 12 pin 13 c24 0.1 f c25 0.1 f c26 0.1 f v ee pin 19 pin 22 c21 0.1 f c22 0.1 f v cco pin 27 c20 0.1 f v cc pin 30 c23 0.1 f v cca dip swi tch v ee cd freqsel1 freqsel2 freqsel3 divsel1 divsel2 clksel r10 1k r9 1k r8 1k r7 1k r6 1k r5 1k r3 1k v cc r27 1k sma1 sma2 sma3 r31 50 ? divsel1
SY87701AL 11 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 bill of materials (ac-coupled) item part number manufacturer description qty c6 293d685x0025b2t vishay (1) 6.8 f, 25v, tantalum capacitor, size b 1 c7 vj1206y103jxjat vishay (1) 0.01 f, x7r, ceramic capacitor, size 1206 1 c10, c11 vj0603y105jxjat vishay (1) 1.0 f, x7r, ceramic capacitor, size 0603 2 c12, c13, c14, vj0402y104jxjat vishay (1) 0.1 f, x7r, ceramic capacitor, size 0402 8 c15, c18, c19, c27, c28 c20, c21, c22, vj0402y104jxjat vishay (1) 0.01 f, x7r, ceramic capacitor, size 0603 7 c23, c24, c25, c26 d1 p301-nd panasonic (2) led, t-1 3/4, red clear 1 d2 p300-nd/p301-nd vishay (1) t-1 3/4 red led 1 j2, j3, j4, j6 111-0702-001 johnson red, insulated thumb nut binding post 4 components (3) (jumped together) j5 111-0703-001 johnson black, insulated thumb nut binding post, gnd 1 components (3) (jumped to v ee ) q1 459-2598-5-nd 2n2222a transistor 1 r1 crcw04023500f vishay (1) 350 ? resistor, 2%, size 0402 1 r2 crcw04026800f vishay (1) 680 ? resistor, 2%, size 0402 1 r3, r4, r5, r6, crcw04021001f vishay (1) 1k ? pull-up resistors, 2%, size 1206 8 r7, r8, r9, r10 r11, r12, r13, crcw04021820f vishay (1) 182 ? resistor, 2%, size 0402 10 r14, r15, r16, r28, r29, r30, r32 r21 crcw06031300f vishay (1) 130 ? resistor, 2%, size 0603 1 r22 crcw04021820f vishay (1) 12.1k ? resistor, 2%, size 1206 1 r23, r24 crcw04022825f vishay (1) 82 ? resistor, 2%, size 0402 2 r25, 26 crcw04021300f vishay (1) 130 ? resistor, 2%, size 0402 2 r27 crcw040200r0f vishay (1) 0 ? resistor, 2%, size 0402 1 r31 crcw04025000f vishay (1) 50 ? resistor, 2%, size 0402 1 sma1-sma10 142-0701-851 johnson end launch sma jack 10 components (1) sp1-sp6 solder jumper option 6 sw1 ct2068-nd 8-position, top actuated slide dip switch 1 u1 sy87700/01 micrel (4) 3.3v 28mbps to 1.3gbps anyrate ? 1 clock and data recovery u2 sy89322v micrel (4) 3.3/5v dual lvttl/lvcmos-to-differential 1 lvpecl translator notes: 1. vishay: www.vishay.com. 2. panasonic: www.panasonic.com. 3. johnson components: www.johnson-components.com. 4. micrel, inc. www.micrel.com.
SY87701AL 12 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 bill of materials (dc-coupled) item part number manufacturer description qty c6 293d685x0025b2t vishay (1) 6.8 f, 25v, tantalum capacitor, size b 1 c7 vj1206y103jxjat vishay (1) 0.01 f, x7r, ceramic capacitor, size 1206 1 c10, c11 vj0603y105jxjat vishay (1) 1.0 f, x7r, ceramic capacitor, size 0603 2 c12, c13, c14, vj0402y104jxjat vishay (1) 0.1 f, x7r, ceramic capacitor, size 0402 8 c15, c18, c19, c27, c28 c20, c21, c22, vj0402y104jxjat vishay (1) 0.01 f, x7r, ceramic capacitor, size 0603 7 c23, c24, c25, c26 d1 p301-nd panasonic (2) led, t-1 3/4, red clear 1 d2 p300-nd/p301-nd vishay (1) t-1 3/4 red led 1 j2, j3, j4, j6 111-0702-001 johnson red, insulated thumb nut binding post 4 components (3) (jumped together) j5 111-0703-001 johnson black, insulated thumb nut binding post, gnd 1 components (3) (jumped to v ee ) q1 459-2598-5-nd 2n2222a transistor 1 r1 crcw04023500f vishay (1) 350 ? resistor, 2%, size 0402 1 r2 crcw04026800f vishay (1) 680 ? resistor, 2%, size 0402 1 r3, r4, r5, r6, crcw04021001f vishay (1) 1k ? pull-up resistors, 2%, size 1206 8 r7, r8, r9, r10 r15, r16, crcw04021820f vishay (1) 182 ? resistor, 2%, size 0402 4 r30, r32 r21 crcw06031300f vishay (1) 130 ? resistor, 2%, size 0603 1 r22 crcw04021820f vishay (1) 12.1k ? resistor, 2%, size 1206 1 r27 crcw040200r0f vishay (1) 0 ? resistor, 2%, size 0402 1 r31 crcw04025000f vishay (1) 50 ? resistor, 2%, size 0402 1 sma1-sma10 142-0701-851 johnson end launch sma jack 10 components (1) sp1-sp6 solder jumper option 6 sw1 ct2068-nd 8-position, top actuated slide dip switch 1 u1 sy87700/01 micrel (4) 3.3v 28mbps to 1.3gbps anyrate ? 1 clock and data recovery u2 sy89322v micrel (4) 3.3/5v dual lvttl/lvcmos-to-differential 1 lvpecl translator notes: 1. vishay: www.vishay.com. 2. panasonic: www.panasonic.com. 3. johnson components: www.johnson-components.com. 4. micrel, inc. www.micrel.com.
SY87701AL 13 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 28-pin soic .300" wide (z28-1) rev. 02 note: the 28-pin soic package is not recommended for new designs.
SY87701AL 14 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 32-pin epad tqfp (die up) (h32-1) rev. 01 pa c kage ep- exposed pad die compside island heat dissipation heavy copper plane heavy copper plane v ee v ee heat dissipation pcb thermal consideration for 32-pin epad-tqfp package
SY87701AL 15 micrel, inc. m9999-111506 hbwhelp@micrel.com or (408) 955-1690 appendix a layout and general suggestions 1. establish controlled impedance stripline, microstrip, or co-planar construction techniques. 2. signal paths should have, approximately, the same width as the device pads. 3. all differential paths are critical timing paths, where skew should be matched to within 10ps. 4. signal trace impedance should not vary more than 5%. if in doubt, perform tdr analysis of all high-speed signal traces. 5. maintain compact filter networks as close to filter pins as possible. provide ground plane relief under filter path to reduce stray capacitance. be careful of crosstalk coupling into the filter network. 6. maintain low jitter on the refclk input. isolate the xtal oscillator from power supply noise by adequately decoupling. keep xtal oscillator close to device, and minimize capacitive coupling from adjacent signals. 7. higher speed operation may require use of fundamental-tone (third-overtone typically have more jitter) crystal based oscillator for optimum performance. evaluate and compare candidates by measuring txclk jitter. 8. all unused outputs must be terminated. to conserve power, unused pecl outputs can be terminated with a 1k ? resistor to v ee . micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchasers use or sale of micrel products for use in life support appliances, devices or systems is at purchasers own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2006 micrel, incorporated.

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